commit 2054396a044c86521d08e666e5b0c1d20446cf3b
author bellard <bellard@c046a42c-6fe2-441c-8c8c-71466251a162> Sun Jun 15 23:28:43 2003 +0000
committer bellard <bellard@c046a42c-6fe2-441c-8c8c-71466251a162> Sun Jun 15 23:28:43 2003 +0000
tree f00a55ba1b43bcaf1850e2251df9e9d6a64ac911
parent 039de852ec1640ff65db641d27caaf2a88d0a10c

fixed include macro pb


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@249 c046a42c-6fe2-441c-8c8c-71466251a162

translate.c

diff --git a/translate.c b/translate.c
index 1309d17..5ccb45e 100644
--- a/translate.c
+++ b/translate.c
@@ -24,20 +24,36 @@
 #include <inttypes.h>
 
 #include "config.h"
+
 #define IN_OP_I386
-#include "cpu-" TARGET_ARCH ".h"
+#if defined(TARGET_I386)
+#include "cpu-i386.h"
+#define OPC_CPU_H "opc-i386.h"
+#elif defined(TARGET_ARM)
+#include "cpu-arm.h"
+#define OPC_CPU_H "opc-arm.h"
+#else
+#error unsupported target CPU
+#endif
+
 #include "exec.h"
 #include "disas.h"
 
 enum {
 #define DEF(s, n, copy_size) INDEX_op_ ## s,
-#include "opc-" TARGET_ARCH ".h"
+#include OPC_CPU_H
 #undef DEF
     NB_OPS,
 };
 
 #include "dyngen.h"
-#include "op-" TARGET_ARCH ".h"
+#if defined(TARGET_I386)
+#include "op-i386.h"
+#elif defined(TARGET_ARM)
+#include "op-arm.h"
+#else
+#error unsupported target CPU
+#endif
 
 uint16_t gen_opc_buf[OPC_BUF_SIZE];
 uint32_t gen_opparam_buf[OPPARAM_BUF_SIZE];
@@ -48,13 +64,13 @@
 #ifdef DEBUG_DISAS
 static const char *op_str[] = {
 #define DEF(s, n, copy_size) #s,
-#include "opc-" TARGET_ARCH ".h"
+#include OPC_CPU_H
 #undef DEF
 };
 
 static uint8_t op_nb_args[] = {
 #define DEF(s, n, copy_size) n,
-#include "opc-" TARGET_ARCH ".h"
+#include OPC_CPU_H
 #undef DEF
 };
 
@@ -123,7 +139,7 @@
 
 static const unsigned short opc_copy_size[] = {
 #define DEF(s, n, copy_size) copy_size,
-#include "opc-" TARGET_ARCH ".h"
+#include OPC_CPU_H
 #undef DEF
 };