commit e2f4c2330f08ba73d9a3c919a3d6ca33dce7d2c2
author Zhen Lei <thunder.leizhen@huawei.com> Tue Jul 07 04:30:17 2015 +0100
committer Will Deacon <will.deacon@arm.com> Wed Jul 08 17:24:39 2015 +0100
tree 959c14ce9b8e53ca73aba64a8f46f8ccd9965e58
parent 5d58c6207c300340151931ad9c2cdea2d1685dc4

iommu/arm-smmu: Enlarge STRTAB_L1_SZ_SHIFT to support larger sidsize

Because we will choose the minimum value between STRTAB_L1_SZ_SHIFT and
IDR1.SIDSIZE, so enlarge STRTAB_L1_SZ_SHIFT will not impact the platforms
whose IDR1.SIDSIZE is smaller than old STRTAB_L1_SZ_SHIFT value.

Signed-off-by: Zhen Lei <thunder.leizhen@huawei.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>

drivers/iommu/arm-smmu-v3.c

diff --git a/drivers/iommu/arm-smmu-v3.c b/drivers/iommu/arm-smmu-v3.c
index 98e987a..29cba32 100644
--- a/drivers/iommu/arm-smmu-v3.c
+++ b/drivers/iommu/arm-smmu-v3.c
@@ -199,9 +199,10 @@
  * Stream table.
  *
  * Linear: Enough to cover 1 << IDR1.SIDSIZE entries
- * 2lvl: 8k L1 entries, 256 lazy entries per table (each table covers a PCI bus)
+ * 2lvl: 128k L1 entries,
+ *       256 lazy entries per table (each table covers a PCI bus)
  */
-#define STRTAB_L1_SZ_SHIFT		16
+#define STRTAB_L1_SZ_SHIFT		20
 #define STRTAB_SPLIT			8
 
 #define STRTAB_L1_DESC_DWORDS		1