tree fb323ff0928be60180c0fa6e069111de9361bb4b
parent b6378cb3e545912a19e6355aa9171326fdc004d8
author Niklas Söderlund <niklas.soderlund@ericsson.com> 1323447135 -0300
committer Mauro Carvalho Chehab <mchehab@redhat.com> 1332354169 -0300

edac: i5100 ack error detection register after each read

If I only ack the detection register after a error have been detected
I'm unable to reliably detect errors. I have verified this behavior
using both an error injection DIMM and software to inject errors.

I can't find any documentation supporting this behavior in Intel 5100
Memory Controller Hub Chipset, see 1. So this is all based on
experimentation.

[1] Intel® 5100 Memory Controller Hub Chipset
    http://www.intel.com/content/dam/doc/datasheet/5100-
	memory-controller-hub-chipset-datasheet.pdf

Signed-off-by: Niklas Söderlund <niklas.soderlund@ericsson.com>
Signed-off-by: Mauro Carvalho Chehab <mchehab@redhat.com>