tree e3cf42c6d714142f202afb59eb740bf96e6ee5b2
parent 584f4318f9236a8b30b0d8717bb047749bc72095
author Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com> 1491334349 +0000
committer Greg Kroah-Hartman <gregkh@linuxfoundation.org> 1491993681 +0200

ASoC: Intel: cht_bsw_rt5645: add Baytrail MCLK support

[ Upstream commit a50477e55fff69e1028f25624ee9fc9182d59b1f ]

The existing code assumes a 19.2 MHz MCLK as the default
hardware configuration. This is valid for CherryTrail but
not for Baytrail.

Add explicit MCLK configuration to set the 19.2 clock on/off
depending on DAPM events.

This is a prerequisite step to enable devices with Baytrail
and RT5645 such as Asus X205TA

Signed-off-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
Signed-off-by: Sasha Levin <alexander.levin@verizon.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>